Avnet Spartan 3E Evaluation Kit

Dec 13, 2006 - updated Jan 4, 2007

About 15 years ago I made a readout for a Mitutoyo caliper, by connecting it to an 8255 parallel I/O port on an 8085 board that I had designed and wire wrapped. The data returning from the caliper, was decoded by software running on the 8085. This software monitored the port looking for clock pulse edges. On the clock edge the state of the data line was recorded. By reading all the bits in this manner the position reading was constructed. A C program running on a PC read the position measurement from the 8085 board. The 8085 also performed other functions, like reading an ADC and running stepper motors.

About 10 years ago I did another interface using TTL logic chips, wire wrapped on an ISA card plugged into a 286 running MSDOS. A C++ program was written to read the position from this board as well as data from other instruments. That system is still being used, but now they want to use a modern computer running Windows XP, and not have to rely on the 286 running MSDOS.

The readout system is now being built to connect via USB. I chose to use the Avnet Spartan 3E Evaluation Kit.

The PROM for the Cypress USB Micro controller was replaced by QuickUSB firmware purchased from Bitwise Systems.

With QuickUSB running the Avnet utility for configuring the FPGA will no longer function, so I borrowed an old Xilinx cable (can't remember the name), but iMPACT 8.2 did not support this cable. By replacing the 0 ohm resistor on JT2 with a jumper I could switch between starting the Cypress chip with QuickUSB firmware or no firmware. By using a jumper on the board you can also reset the Cypress chip without unplugging the USB cable. This way you can be running in no firmware mode, to configure the FPGA using the Avnet utility. The jumper was changed and the cypress reset to start up with QuickUSB. I could then test my Windows code which reads the Mitutoyo position reading from my FPGA logic.

The vector board visible beneath the Avnet board just holds the jumper for selecting the Cypress chip firmware. An extra connector was added to the cable for clipping the scope probes on. It would have been easier if I could get ModelSim to work with ISE 8.2, to get my logic worked out before dumping it into the FPGA.

The Xilinx Platform USB cable was obtained to make it easier to change the FPGA configuration. Downloading via the Platform USB cable fails when first starting the board with QuickUSB firmware. After the FPGA has been configured once with the board in Cypress with no firmware mode, it can then be reconfigured when the Cypress chip is running QuickUSB.

The Mitutoyo signals were fed back out on other FPGA pins for looking at with the scope. Bad scope grounding gives wavy traces.

Since it works, I cleaned up my cables.

Getting my FPGA configuration into the SPI Flash memory on this board was a real nightmare. I am using ISE 8.2, but you need ISE 7.1 in order to generate a HEX file to use with the Avnet utility for Writing to the SPI Flash. What I didn't realize, and what Avnet did not mention in their documentation was the need to do a bulk erase before doing a write.

You should be able to use iMPACT with the Platform Cable USB and flying leads connected to the SPI Flash connector on the Avnet board. Bugs in iMPACT 8.2 prevented this from working. There is also a utility xspi_usb which can be downloaded from the Xilinx website with should do the job, but it has the same bugs as iMPACT 8.2. Search for xapp445 in the documentation section of the Xilinx website.